1. Technical Field
The present disclosure refers to the non-volatile memory field, and in particular it refers to techniques for reading such memories.
2. Description of the Related Art
As it is known, for non-volatile memories (wherein the memory cell includes a floating gate MOS transistor) reading cells includes: decoding the addresses of the memory cell to be read, routing the voltages for biasing the row and column lines identifying the cell, sensing the cell contents, including buffering the read data, which will be thereafter made available on the output pin of the memory.
The step of sensing is carried out by a sense amplifier comprising, typically, a differential amplifier provided with an input node to be connected to the cell to be read. The differential amplifier output depends on the electric signal present in the input node thereof, in turn dependant on the stored data in the memory cell.
Moreover, the sense amplifier may be provided with a comparator which, based on the signal detected by the differential amplifier, returns the logic value corresponding to the read data. The differential amplifier operates with a preset voltage value on its input node.
US-A-2005-0030809 discloses, inter alia, a sense circuit which operates according to the “voltage ramp” technique. This sense circuit provides a current injection at the input node of a differential amplifier, carried out by both a precharging circuit and the output of the sense amplifier itself, which is connected to the input node by a feedback resistor. According to this technique, the precharging circuit is actuated at the same time as the differential amplifier, before the real sensing step starts and it is deactivated at the end of the sensing step.
The Applicant recognizes that such a sense amplifier involves the presence of two current absorption peaks which occur at the power-up and down of the sense amplifier, respectively.